Category Engineering Hire Type Employee Job ID 5193 Remote Eligible No Date Posted 23/08/2024
Synopsys delivers leading silicon to systems design solutions that maximize our customers’ R&D capability and productivity. Companies trust Synopsys to pioneer new technologies getting them to market faster without compromise.
Our Analog Mixed Signal IP Team is seeking for Analog Mixed Signal (A&MS) TOP-level Timing Verification Engineer, Staff to join our talented team. If you are an experienced A&MS TOP Simulation Engineer who wants to join a team of experts in high-end Analog Mixed Signal design with latest process technologies and a great team player, this is a suitable position for you.
Responsibilities:
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Manage the Timing Budget for Die to Die Interface system through variant type of jitters from every sub-designs including PLL, LCDL, DCA, TX, RX … to make sure the robustness of system.
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Do TOP-level simulation for full Die to Die system in order to validate the timing …
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